1. Field of the Invention
The present invention relates to a plasma processing system, and to a plasma processing method, and to a method of manufacturing a semiconductor device using the plasma processing system and method. More particularly, the present invention relates to a method of manufacturing a semiconductor device in which a wafer is chucked and secured by utilization of an electrostatic chuck.
2. Description of the Background Art
A method of manufacturing an integrated circuit called an IC or a LSI usually employs an etching process in a process of forming a pattern. In a system to be used for the etching process, there has been employed an electrostatic chuck for securing a wafer to an electrode. The wafer is secured by means of utilizing an electrostatic force developing in the electrode. The electrostatic force is generated by means of applying a high frequency, such as microwaves, to the inside of a processing chamber where the wafer is to be processed.
FIG. 3 is a view for describing the structure of a conventional plasma processing system (wafer etching system).
In FIG. 3, reference numeral 1 designates awafer. For instance, there is used a Si wafer 8 inches in diameter as the wafer 1. Although not shown, a film to be etched, for example, an oxide film (SiO2) is formed on the wafer 1. Reference numeral 2 designates an insulating coating placed on a power electrode 3 disposed in a processing chamber (not shown). The wafer 1 is to come into contact with the insulating coating 2. For instance, a film containing titania or alumina is used as material of the insulating coating 2. The power electrode 3 chucks and retains the wafer 1 thereon by way of the insulating coating 2. For instance, an aluminum alloy A5052 is used as material for the power electrode 3. Reference numeral 4 designates a matching circuit for matching the voltage of a high-frequency power supply 5 and the voltage applied to the power electrode 3.
The high-frequency power supply 5 produces a voltage for producing plasma to be used for effecting an etching reaction. Further, the high-frequency power supply 5 produces a voltage to be used for securing the wafer 1 to the power electrode 3. The voltage supplied by the high-frequency power supply 5 is about 1 KV, and a power supply frequency is 13.56 MHz. Reference numeral 6 designates a ground electrode serving as a ground at the time of development of the plasma. The size of the ground electrode 6 corresponds with the diameter of the wafer 1. An aluminum alloy A5052 is used as a material of the ground electrode 6. Reference numeral 7 designates a variable resistor used for adjusting the matching circuit 4. Thereby, the matching circuit 4 matches the power electrode 3 to the high-frequency power supply 5. Reference numeral 8 designates a DC (direct current) power supply capable of switching between application of a negative voltage and application of a positive voltage. Reference numeral 9 designates a cooling gas supplied from a cooling gas system (not shown), the cooling gas 9 being used for removal the wafer 1. For example, N2 gas is used as the cooling gas 9.
Etching process of the wafer 1 is performed through use of the above system while the processing chamber is maintained in a high vacuum (usually 10−7 Torr or thereabouts).
Next, procedures for processing a wafer will be described.
First, the wafer 1 is transported onto the power electrode 3 by use of unillustrated transport apparatus, such as a robot. Next, a positive power of about 1 KV is applied from the DC power supply 8 to the power electrode 3. Thus, the wafer 1 is secured to the power electrode 3 by means of the electrostatic attracting force developing in the power electrode 3. At this time, an electrostatic attracting force of 600 g or more is exerted on the power electrode 3 in the vertical direction.
Next, a high-frequency voltage, which is used for developing plasma between the power electrode 3 and the ground electrode 6, is applied from the high-frequency power supply 5. Thereby, an etching process of the wafer 1 is performed. At this time, the matching circuit 4 matches the voltage of the high-frequency power supply 5 to the voltage applied to the power electrode 3.
After completion of the etching process, the polarity of the voltage, which is supplied by the DC power supply 8, to be used for chucking the wafer 1 is switched in the DC power supply 8. Namely, a maximum of −2 KV of negative voltage is applied to the power electrode 3. Thereby, electrical charges of the power electrode 3 are removed. Next, the cooling gas 9 to be used for removal the wafer 1 is supplied. Thus, the wafer 1 is removed from the power electrode 3. Finally, the wafer 1 removed from the power electrode 3 is transported from the power electrode 3 through use of transport apparatus, such as a robot.
The conventional wafer etching system (plasma processing system) sets forth the following problems.
The method of removing the wafer 1 using a cooling gas 9 fails to correctly remove electric charges from the wafer 1, and to detect the wafer 1, and to detect removal of the wafer 1 from the electrostatic chuck.
Therefore, deviation of the wafer 1 due to anomalous operation of a removal mechanism results in a transport failure or in a fracture of the wafer 1.
Further, the throughput of the wafer 1 is not improved for reasons of the failure to detect removal of the wafer, thus deteriorating productivity.